1. Field of Invention
The invention relates to an integration scheme for metal gap fill with a Fixed Abrasive CMP (chemical mechanical polishing feature (FAP) to enable polishing of the topography only of an oxide or metal layer, when modifying the exposed surface of a semiconductor wafer.
2. Description of the Related Art
In a process integration scheme for preparing a semiconductor wafer, the wafer typically undergoes many processing steps, and these processing steps include deposition, patterning, and etching steps. Typically, at each step during the manufacturing process, it is useful to attain a predetermined level of uniformity and/or planarization. Further, it is also useful to minimize any surface defects in the wafer, such as scratches and pits, since these surface defects will affect the performance of the ultimate patterned semiconductor wafer.
One well known method for reducing surface irregularities during the manufacture of semiconductor wafers is to treat the wafer surface with a slurry that contains a plurality of loose abrasive particles using a polishing pad.
U.S. Pat. No. 6,007,407 disclose a method of modifying an exposed surface of a semiconductor wafer comprising:                (a) contacting the surface with an abrasive construction comprising a three-dimensional, fixed abrasive element having raised portions and recess portions, wherein the raised portions comprises abrasive particles and binder; at least one resilient element coextensive with the fixed abrasive element; and at least one rigid element coextensive with and interposed between the resilient element and the fixed abrasive element; wherein the rigid element has a Young's Modulus greater than that of the resilient element; and        (b) relatively moving the wafer and the abrasive construction to modify the surface of the wafer.        
A method of modifying a processed semiconductor wafer containing topographical features is disclosed in U.S. Pat. No. 5,958,794. The method entails:                (a) contacting an exposed surface of the semiconductor wafer with a three-dimensional, textured, fixed abrasive article comprising a plurality of abrasive particles and a binder arranged in the form of a pattern; and        (b) relatively moving the wafer and the fixed abrasive article in the presence of a liquid medium to chemically and mechanically modify the surface of the wafer.        
U.S. Pat. No. 6,325,702 B2 disclose a method for chemical-mechanical-polishing (CMP) to selectively remove a first material over a second material, wherein said first material and said second material form part of a substrate assembly. The method comprises:                selecting a pad configured to remove the first material more rapidly than the second material, the pad being formed at least in part of an intrinsically non-porous material with respect to CMP solution particles to be used therewith, the pad formed with spaced-apart contact portions;        the contact portions separated by at least one non-contact portion, the contact portions formed of the intrinsically non-porous material to provide a surface to contact the substrate assembly during CMP, the contact portions spaced-apart to provide a duty cycle, the duty cycle determined at least in part by:        selecting a contact width for the contact portions based at least in part on the CMP solution, the first material, and the second material;        selecting a non-contact width associated with spacing of the contact portions, the non-contact width selected based at least in part on the CMP solution, the first material, and the second material; placing the pad on a chemical-mechanical-polisher platform; providing the CMP solution to the pad; and polishing the substrate assembly using the pad and the CMP solution.        
A method of modifying a surface of a semiconductor wafer is disclosed in U.S. Pat. No. 6,234,875 B1, and comprises:                (a) contacting the surface to be modified with a working surface of an abrasive article, the working surface comprising a phase separated polymer having a first phase and a second phase, the first phase being harder than the second phase; and        (b) relatively moving the surface to be modified and the abrasive article to remove material from the surface to be modified in the absence of an abrasive slurry.        
In the integration schemes of existing methods for reducing surface irregularities in manufacturing semiconductor wafers, there is a need for: process simplification and cost reduction;                improvement in the process for obtaining uniformity; preventing metal line damage due to CMP; and elimination of CMP “send aheads.”        